FPGA

cook timer- 동작적 모델링

박순창 2021. 4. 12. 16:39
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날짜 : 21.04.12 

제목 : cook timer - 동작적 모델링

module cook_timer(
    input clk,
    input [3:0] btn,
    output [3:0] led,
    output [3:0] com,
    output [6:0] seg_7
    );
    
    wire [3:0] debouced_btn;
    wire clk_msec, clk_sec;
    reg [3:0] user_sec_1=0, user_sec_10=0;
    reg [3:0] user_min_1=0, user_min_10=0;
    wire [3:0] hex_value;
    reg [3:0] countdown_enable=0;
    reg [3:0] sec_1, sec_10, min_1, min_10;
    reg [3:0] hex_value_1, hex_value_10, hex_value_100, hex_value_1000;
    
    D_flip_flop D0 (.clk(clk_msec), .D(btn[0]), .Q(debouced_btn[0]), .reset(1'b1), .preset(1'b1));
    D_flip_flop D1 (.clk(clk_msec), .D(btn[1]), .Q(debouced_btn[1]), .reset(1'b1), .preset(1'b1));
    D_flip_flop D2 (.clk(clk_msec), .D(btn[2]), .Q(debouced_btn[2]), .reset(1'b1), .preset(1'b1));
    D_flip_flop D3 (.clk(clk_msec), .D(btn[3]), .Q(debouced_btn[3]), .reset(1'b1), .preset(1'b1));
    
    clock_10min G (.clk(clk), .clk_10min(clk_10min), .clk_sec(clk_sec), .clk_usec(clk_usec), .clk_msec(clk_msec));
    
    decoder_7seg D (.hex_value(hex_value), .seg_7(seg_7));
    
    seg7_switcher S (.clk_msec(clk_msec),
        .hex_value_1(hex_value_1), .hex_value_10(hex_value_10), 
        .hex_value_100(hex_value_100), .hex_value_1000(hex_value_1000),
        .hex_value(hex_value), .com(com));
    
    always @ (posedge debouced_btn[0]) begin
        if(user_sec_1 == 9) begin
            user_sec_1 = 0;
            if(user_sec_10 == 5) begin
                user_sec_10 = 0;
            end
            else user_sec_10 = user_sec_10 + 1; 
        end
        else user_sec_1 = user_sec_1 + 1;
    end
    always @ (posedge debouced_btn[1]) begin
        if(user_min_1 == 9) begin
            user_min_1 = 0;
            if(user_min_10 == 5) begin
                user_min_10 = 0;
            end
            else user_min_10 = user_min_10 + 1; 
        end
        else user_min_1 = user_min_1 + 1;
    end
    always @ (posedge debouced_btn[2]) begin
        if(countdown_enable) countdown_enable = 0;
        else countdown_enable = 1;
     end
    
    always @ (negedge clk_sec) begin
        if(countdown_enable) begin                 
            if(!sec_1) begin
                sec_1 = 9;
                if(!sec_10) begin
                    sec_10 = 5;
                    if(!min_1) begin
                        min_1 = 9;
                        if(!min_10) min_10 = 5;             
                        else min_10 = min_10 - 1;
                    end
                    else min_1 = min_1 - 1;
                end
                else sec_10 = sec_10 - 1;
            end
           else sec_1 = sec_1 - 1;
        end
        else begin
            sec_1 = user_sec_1;
            sec_10 = user_sec_10;
            min_1 = user_min_1;
            min_10 = user_min_10;
        end
    end
    always @ (countdown_enable) begin
        if(countdown_enable) begin
            hex_value_1 = sec_1;
            hex_value_10 = sec_10;
            hex_value_100 = min_1;
            hex_value_1000 = min_10;
        end  
        else begin
             hex_value_1 = user_sec_1;
             hex_value_10 = user_sec_10;
             hex_value_100 = user_min_1;
             hex_value_1000 = user_min_10;
        end  
    end    
endmodule

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